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Superposition Modulation: Myths and Facts
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Superposition Modulation: Myths and Facts

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INTRODUCTION

Since Shannon’s landmark contribution in 1948,
it has been known that any communication channel
is characterized by a so-called channel capacity.
Channel capacity is, in simple words, the
maximum achievable throughput in bits per
channel symbol (called transmission rate) subject
to the constraint of quasi-error-free transmission.
Operating near capacity implies power efficiency
and simultaneously bandwidth efficiency. A
transmission scheme is called power efficient if
the average transmit power per information bit
for a given quality constraint is sufficiently small.
Discussions on “green radio,” for example, indicate
that power efficiency is becoming even
more important nowadays. A transmission
scheme is called bandwidth efficient if many
information bits can be transmitted per time unit
in a given bandwidth. Particularly in wireless
communications, we experience that bandwidth
is sparse and becoming really expensive.


THE PRINCIPLE OF SUPERPOSITION MODULATION

In order to explain the principle of superposition
modulation, let us consider the summation of
two random sequences with elements +1 and –1,
respectively. For example, the first sequence is
[+1, –1, +1, –1], the second sequence [+1, –1,
–1, +1]. Each sequence is referred to as a layer.
Trivially, the sum is [+2, –2, 0, 0] if both
sequences are equally weighted by one. Given a
received value of ±2, the mapping can uniquely
be reversed. However, if the received value is 0,
detection is ambiguous, because it is unclear
whether +1 –1 or –1 + 1 has been superimposed.
As shown later, SM with real-valued equal
weighting is always non-bijective. In our example
N = 2 bits are mapped onto just M = 3 signal
points, where M < 2N.


PROPERTIES OF SUPERPOSITION MODULATION

Given these preliminary remarks, we are now
ready to formally define SM using complex baseband
notation [6, 10]. As shown in Fig. 1, a binary
data stream is first split into N parallel binary
data streams. Let bn ∈ {0, 1} denote the nth
information bit for a certain time slot, 1 ≤ n ≤ N.
All bits bn are mapped onto binary antipodal
symbols dn ∈ {+1, –1}. Afterward, the symbols
dn are weighted by a set of complex-valued factors
αn ∈CI in order to obtain N chips cn in parallel.
This weighting corresponds to power and
phase allocation and is crucial for the performance
of SM.


EQUAL POWER ALLOCATION

Considering power normalization, in the case of
equal power allocation (EPA) the weighting factors
are fixed according to αn = 1/√

N for all 1 ≤
n ≤ N. It can easily be proven that the number of
distinct symbols x (i.e., the cardinality of the
symbol alphabet X) is equal to ⎪X⎪ = N + 1.
Since N + 1 < 2N, SM-EPA is always non-bijective.
An interesting interpretation is that SMEPA
incorporates a lossy source encoder, a fact
that is explored later. The data symbols are
binomial distributed. For N → ∞, the binomial
distribution approaches a Gaussian distribution.


GROUPED POWER ALLOCATION
So far, we observed that SM-EPA is non-bijective.
Due to near-Gaussian quadrature components,
no active shaping is necessary for
achieving the capacity. The main bottleneck,
however, is that H(X) ~ log2(N). In contrast,
SM-UPA is bijective, but not capacity achieving
and hence not further elaborated.
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